Methods of forming transistors and CMOS semiconductor devices using an SMT technique

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United States of America Patent

PATENT NO 8101480
SERIAL NO

12944774

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Abstract

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A method of forming a transistor induces stress in the channel region using a stress memorization technique (SMT). Impurities are implanted into a substrate adjacent a gate electrode structure to produce an amorphous region adjacent the channel region. The amorphous region is then recrystallized by forming a metal-oxide layer over the amorphous region, and then thermally treating the same. The crystallization creates compressive stress in the amorphous region. As a result, stress is induced in the channel region of the substrate located under the gate electrode structure.

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Patent Owner(s)

  • SAMSUNG ELECTRONICS CO., LTD.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kang, Sang-Bom Seoul, KR 80 5476
Kim, Seok-Hoon Hwaseong-si, KR 37 617
Koh, Chung-Geun Seoul, KR 6 81
Kwon, Tae-Ouk Hwaseong-si, KR 7 158
Lee, Hyun-Jung Suwon-si, KR 74 762
Lim, Kwan-Yong Seongnam-si, KR 111 1501

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