Processor enabling input/output of data during execution of operation

United States of America Patent

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May 31, 2011
Grant Date
Apr 17, 2008
app pub date
Oct 9, 2007
filing date
Oct 17, 2006

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Expired

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Abstract

and a switching network so as to enable all communications. Therefore, data reading and data writing by the PE is performed in parallel with the data transfer with the outside, so that processing time of the PE can be reduced.

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RENESAS ELECTRONICS CORPORATION

International Classification(s)

G06F:ELECTRIC DIGITAL DATA PROCESSING

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Inventor(s)

Inventor Name	Address	# of filed Patents	Total Citations
Nakajima, Masami	Tokyo, JP	16	83

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Processor enabling input/output of data during execution of operation

Number of patents in Portfolio can not be more than 2000

United States of America Patent

11907049

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PATENT NO	7953938
APP PUB NO	20080091904A1
SERIAL NO	11907049
DOCKET NO

US Family Size	Non-US Coverage
Patent Longevity Expired	Forward Citations

DATE PUBLISHED	PUBLICATION/PATENT NO.	PUBLICATION TYPE
May 31, 2011	US,7953938,B2 US7953938B2	GRANTED PATENT AS SECOND PUBLICATION
April 17, 2008	US,20080091904,A1 US20080091904A1	FIRST PUBLISHED PATENT APPLICATION

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11907049

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