Equalizing circuit for semiconductor memory device
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United States of America Patent
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Mar 2, 2010
Grant Date -
Mar 29, 2007
app pub date -
Sep 28, 2006
filing date -
Sep 29, 2005
priority date (Note) -
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Abstract
A semiconductor memory device includes an equalizing signal generation circuit comprising a clamping circuit that clamps a voltage level less than the voltage level of a high voltage level by being controlled by the high voltage, and an equalizing signal driver receiving an output signal of the equalizing signal generation circuit as a driving signal.
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