Semiconductor device provided with antenna ratio countermeasure circuit

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United States of America Patent

PATENT NO 7589566
APP PUB NO 20060119395A1
SERIAL NO

11290805

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Abstract

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A CMOS LSI includes an inverter including first and second MOS transistors, a relatively long metal interconnection connected to an input node of the inverter, first and second diodes releasing charges born by the metal interconnection during a plasma process to first and second wells, and first and second MOS transistors maintaining a voltage between the first and second wells at a level not higher than a prescribed voltage. Therefore, even when an antenna ratio is high, a gate oxide film in the first and second MOS transistors is not damaged during the plasma process.

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Patent Owner(s)

  • RENESAS ELECTRONICS CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ishibashi, Koichiro Tokyo , JP 204 3844
Makino, Hiroshi Tokyo , JP 140 2786
Ohbayashi, Shigeki Tokyo , JP 70 1244
Suzuki, Hiroaki Tokyo , JP 393 4750

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