Methodology for stitching reduced-order models of interconnects together

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United States of America Patent

PATENT NO 6810506
SERIAL NO

10152408

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Abstract

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A computer implemented method of producing a reduced order model of an electronic circuit to model the connection of two or more circuits. Arnoldi reduced order models for nodes of circuits to be interconnected may be computed. A set of modified nodal analysis matrices for the combination of the two circuits may be constructed. A rank one update may be applied to the modified set of nodal analysis matrices to produce a reduced order model of the combined electronic circuits. In this novel manner, a reduced order model for a combination of circuits may be produced from the individual reduced order models of the individual circuits without the need to recompute the reduced order models of the original circuits, and without the need of the original parasitic network models. The resulting reduced order model may be used in a variety ways consistent with well known uses of such matrices within the field of electronic design automation.

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Patent Owner(s)

  • SYNOPSYS, INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Levy, Harold J Los Gatos, CA 18 434

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