Methods for forming memory cell structures
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United States of America Patent
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Nov 26, 2002
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N/A
app pub date -
Jan 14, 2002
filing date -
Jan 14, 2002
priority date (Note) -
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Abstract
Within a first of a pair of methods for forming a memory cell structure there is employed a sacrificial spacer layer formed adjacent a capacitor structure and subsequently stripped therefrom to provide an air gap void interposed between a bitline stud layer and the capacitor structure. Within a second of the pair of methods for forming a memory cell structure there is employed a topographically variable thickness masking layer as a self aligned mask layer for forming a patterned capacitor plate layer from a topographic blanket capacitor plate layer. The methods provide for readily forming the memory cell structure with enhanced performance.
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