Method for reducing cache conflict misses
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United States of America Patent
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Nov 20, 2007
Grant Date -
Jun 26, 2003
app pub date -
Apr 4, 2002
filing date -
Dec 20, 2001
priority date (Note) -
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status (Latency Note)
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Abstract
An invention is provided for reducing cache conflict misses via specific placement of non-split functions and data objects in main memory based on cache size. A cache size of a computer cache memory is determined, and a first data block is placed within a main computer memory. The first data block includes a first sub-block that will be frequently referenced. In addition, the first sub-block ends at a first ending address. A second data block is then placed within the main computer memory. The second data block includes a second sub-block that will be frequently referenced, and is placed such that the second sub-block will be contiguous with the first sub-block in the computer cache memory during execution.
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