Semiconductor memory device with word lines adjacent and non-intersecting with capacitor grooves

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United States of America Patent

PATENT NO 4961095
SERIAL NO

07314242

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Abstract

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A grooved separating region 112 having information electric charge storing capacitances C.sub.P formed on side surfaces thereof is formed to extend the region between the adjacent word line 107 in parallel with the word line 107. As a result, the grooved separating region 112 does not contact the channel region 111 of the gate transistors and does not intersect the word line 107.

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Patent Owner(s)

  • MITSUBISHI DENKI KABUSHIKI KAISHA

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Mashiko, Koichiro Hyogo, JP 60 1245

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