I.sup.2C device including bus switches and programmable address
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United States of America Patent
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Aug 1, 2006
Grant Date -
May 5, 2005
app pub date -
Oct 30, 2003
filing date -
Oct 30, 2003
priority date (Note) -
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status (Latency Note)
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Abstract
An I.sup.2C device is disclosed that includes a main I.sup.2C section, bus switches, switch logic, and address logic as part of the I.sup.2C device. The I.sup.2C device is coupled to an I.sup.2C bus for communicating with other I.sup.2C devices and an I.sup.2C bus controller that is also on the I.sup.2C bus. The switch logic controls a current position of the switches. The I.sup.2C device is coupled to the I.sup.2C bus utilizing the switches. The switches control whether the main I.sup.2C section, the address logic, the switch logic, or a combination of the main I.sup.2C section, address logic, and switch logic is currently coupled to I.sup.2C bus. The switches also can be used, if desired to remove from the buss all devices that are downstream from a given device containing switches. The address logic is used to receive and store the address of the I.sup.2C device. The I.sup.2C device will respond to the address that is stored in its address logic.
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