Method of manufacturing a semiconductor device including recessed-channel-array MOSFET having a higher operational speed
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United States of America Patent
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Mar 8, 2011
Grant Date -
Feb 18, 2010
app pub date -
Oct 22, 2009
filing date -
Aug 17, 2006
priority date (Note) -
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Abstract
A semiconductor device includes a recessed-channel-array MOSFET including a gate electrode having a portion received in a recess. The gate insulting film has a first portion made of silicon oxide in contact with the sidewall of the recess and a second portion made of silicon oxynitride in contact with the bottom of the recess. The first portion has an equivalent oxide thickness larger than the equivalent oxide thickness of the second portion to reduce the parasitic capacitance of the gate electrode.
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