Phase locked loop with digital compensation for analog integration
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United States of America Patent
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May 21, 2013
Grant Date -
Jun 9, 2011
app pub date -
Dec 7, 2009
filing date -
Dec 7, 2009
priority date (Note) -
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Abstract
A phase locked loop (PLL) device includes a digital differentiator configured to differentiate a digital loop signal to at least partially compensate for the integration of an analog current signal by an analog integrator. A digital to analog converter (DAC) includes a current source output stage that generates the analog current signal based on an digital input signal. The analog integrator integrates the analog current signal to generate a voltage control signal for controlling a voltage controlled oscillator (VCO).
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