Data output clock signal generating apparatus and semiconductor integrated circuit with the same
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United States of America Patent
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Mar 1, 2011
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N/A
app pub date -
Jul 1, 2009
filing date -
Jul 11, 2007
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Abstract
A data clock control apparatus includes a bias voltage generator configured to receive a plurality of test mode signals and a plurality of fuse signals and to generate a bias voltage to secure a predetermined potential difference from an external driving power supply, and a clock signal controller configured to receive the bias voltage and to buffer an external clock signal and outputs a data output clock signal.
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