PCI debugging device, method and system
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United States of America Patent
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Feb 25, 2003
Grant Date -
N/A
app pub date -
Dec 13, 1999
filing date -
Aug 27, 1999
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A PCI debugging device, method and system. The PCI interface includes a request signal, a grant signal and a target ready signal. The system has a debugging mode such that current grant signal will be retained as long as the request signal remains activated. Using a decoding comparator circuit, the debugging device decodes an instantaneous command signal from the PCI interface and compares with a user-defined wait-to-debug command signal so that an identical command signal for activating the request signal can be generated. Due to the continuous activation by the request signal on the PCI interface, the system halts to display system data via a display circuit so that debugging is facilitated.
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