CMOS flip-flop having non-volatile storage
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United States of America Patent
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Jun 15, 1999
Grant Date -
N/A
app pub date -
Mar 14, 1997
filing date -
Mar 14, 1997
priority date (Note) -
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Abstract
A flip-flop includes non-volatile storage of a bit for encryption purposes or other applications. The non-volatile bit remains in the flip-flop, substantially unaltered, irrespective of normal flip-flop operation, and is available to be recalled whenever it is needed. The flip-flop is implemented using a pair of CMOS cells. Each cell includes a floating gate formed by connecting the gates of an n-mos transistor and a p-mos transistor. One of the two floating gates is selectively charged by hot electron injection, thereby raising the threshold of that cell. Depending upon which of the two cells is programmed by this process, the flip-flop outputs a logic one or a logic zero during a recall mode.
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