Memory array with buried bit lines
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United States of America Patent
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May 18, 2004
Grant Date -
N/A
app pub date -
Mar 12, 2002
filing date -
Mar 12, 2002
priority date (Note) -
Expired
status (Latency Note)
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Abstract
In a memory device, a substrate has a plurality of source/drain regions in the substrate. Between the source/drain regions are trenches filled with oxide. Individual bit lines in the form of conductive regions are provided in the substrate, each bit line being under and running along the oxide in a trench. Each bit line connects to source/drain regions by means of connecting conductive regions extending from that bit line to source/drain regions.
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