Importance

Loading Importance Indicators...

Abstract

An integrated circuit fabrication method for filling a high-aspect-ratio via with a metallization layer wherein there is provided a dielectric layer having a via therein. A wetting layer is deposited over the dielectric layer and within the via and the via sidewalls, the wetting layer being of a material which lowers the melting temperature of the metallization when combined with the metallization. The metallization layer is deposited over the wetting layer and the via but not completely filling the via with the metallization. The wetting agent with metallization thereon are heated to a temperature below the melting temperature of the metallization, the temperature being sufficient to cause the wetting layer to combine with the metallization, lower the melting temperature of the metallization to the temperature or below the heating temperature to cause the metallization to flow and fill the via. A diffusion barrier layer can be provided on the wetting layer over horizontal portions of the dielectric layer, but not on the wetting layer at sidewalls of the via.

Loading the Abstract Image...

First Claim