Importance

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Abstract

A semiconductor integrated circuit having a test circuit for inspecting states of connections between a plurality of pads and respective external terminals by bonding wires. The test circuit comprises, for each of a plurality of pads, a control terminal provided to receive a control signal of a logic level equal to the logic level of a signal applied to a corresponding one of the external terminals, an inverter which inverts the logic level on the control terminal, an inverted output terminal of the inverter being connected to the pad via a connection line; and an exclusive-NOR gate which outputs an exclusive NOR of the logic level on the connection line and the logic level on the control terminal.

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First Claim