Semiconductor memory device and method for driving semiconductor memory device
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United States of America Patent
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Jul 31, 2012
Grant Date -
Nov 24, 2011
app pub date -
Aug 3, 2011
filing date -
Jun 30, 2008
priority date (Note) -
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Abstract
A semiconductor memory device includes a plurality of memory cell transistors arranged in a matrix; a plurality of word lines commonly coupling the control gates of the plural memory cell transistors present in a identical first direction; a plurality of source lines commonly coupling the sources of the plural memory cell transistors present in the identical first direction; a plurality of bit lines commonly coupling the drains of the plural memory cell transistors present in a identical second direction intersecting the first direction; a first transistor having a drain coupled to the source line; a second transistor having a drain coupled to a source of the first transistor, a gate coupled to the word line and a source grounded; and a control line commonly coupling the gates of the plural first transistors.
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