Packages with Si-substrate-free interposer and method forming same
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United States of America Patent
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Oct 11, 2022
Grant Date -
Dec 3, 2020
app pub date -
Aug 17, 2020
filing date -
Apr 10, 2017
priority date (Note) -
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Abstract
A method includes forming a plurality of dielectric layers, forming a plurality of redistribution lines in the plurality of dielectric layers, etching the plurality of dielectric layers to form an opening, filling the opening to form a through-dielectric via penetrating through the plurality of dielectric layers, forming a dielectric layer over the through-dielectric via and the plurality of dielectric layers, forming a plurality of bond pads in the dielectric layer, bonding a device die to the dielectric layer and a first portion of the plurality of bond pads through hybrid bonding, and bonding a die stack to through-silicon vias in the device die.
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