Semiconductor memory device with improved operation speed
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United States of America Patent
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May 24, 2022
Grant Date -
Nov 26, 2020
app pub date -
Dec 2, 2019
filing date -
May 20, 2019
priority date (Note) -
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Abstract
A semiconductor memory device is provided. The semiconductor memory device includes a memory cell array disposed on a substrate, a bit line connected to the memory cell array, a peripheral circuit disposed between the memory cell array and the substrate, the peripheral circuit including a transistor, a conductive line disposed between the memory cell array and the transistor, a lower connection structure connecting the conductive line and the transistor, and two or more upper connection structures connecting the bit line and the conductive line, the two or more upper connection structures being spaced apart from each other.
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