Acyclic modeling of combinational loops
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United States of America Patent
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Nov 18, 2008
Grant Date -
Jun 8, 2006
app pub date -
Mar 1, 2005
filing date -
Nov 15, 2004
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Abstract
Aspects of the present invention are directed to converting non-oscillatory combinational loops into acyclic circuits. Combinational loops may be modeled as state-holding elements where non-oscillatory loops are broken using edge-sensitive latches. In addition to providing a way to model combinational loops originally consisting only of gates (i.e., without originally including any state-holding elements), loops that have paths through user latches may also be converted. The presented methodology may be used with both small and large loops.
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