Determination of clock path delays and implementation of a circuit design

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United States of America Patent

PATENT NO 10289784
SERIAL NO

15432537

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Abstract

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The disclosed approaches process a circuit design that specifies a clock signal. A plurality of wire segments of an integrated circuit (IC) are selected for a clock path to carry the clock signal. A delay of the clock path is determined based on delay values associated with identifiers of the wire segments and variation factors. Configuration data is generated from the circuit design once the delay of the clock path satisfies a timing constraint, and a circuit is generated from the configuration data to implement a circuit according to the circuit design.

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Patent Owner(s)

Patent OwnerAddress
XILINX INC2100 LOGIC DRIVE SAN JOSE CA 95124

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hwang, Chiao K Bakersfield, US 3 4
Ling, Zicheng G San Jose, US 8 46
Savithri, Nagaraj Richardson, US 12 29

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