System and method for correcting phase noise in digital-to-analog converter or analog-to-digital converter
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United States of America Patent
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Jul 9, 2013
Grant Date -
Nov 24, 2011
app pub date -
May 19, 2010
filing date -
May 19, 2010
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Abstract
A circuit includes a digital oscillator, a phase lock loop (PLL), a digital signal generator, a correction circuit and a digital-to-analog converter DAC (DAC). The digital oscillator can output a reference clock signal. The PLL can output a system clock signal based on the reference clock signal. The digital signal generator can output a digital signal based on the system clock signal. The correction circuit can output a pre-distorted signal based on the reference clock signal, the system clock signal and the digital signal. The DAC can output an analog signal based on the pre-distorted signal and the system clock signal.
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