Simultaneous formation of a top oxide layer in a silicon-oxide-nitride-oxide-silicon (SONOS) transistor and a gate oxide in a metal oxide semiconductor (MOS)

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United States of America Patent

PATENT NO 8222111
SERIAL NO

12782699

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Abstract

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A method for semiconductor fabrication. The method includes providing a silicon substrate and forming a tunnel oxide layer over the silicon substrate. Thereafter, a nitride layer is formed over the tunnel oxide layer. The nitride layer and the tunnel oxide layer are etched except where at least one nonvolatile silicon oxide nitride oxide silicon (SONOS) transistor is formed. Additionally, oxide layers are simultaneously formed over the nitride layer corresponding to where at bast one SONOS memory transistor is formed and over the exposed silicon substrate corresponding to where at least one metal oxide semiconductor (MOS) transistor is formed.

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Patent Owner(s)

Patent OwnerAddress
MONTEREY RESEARCH LLC3945 FREEDOM CIRCLE SUITE 900 SANTA CLARA CA 95054

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hwang, Jeong-Mo Colorado Springs, US 14 378

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