Floating gate and fabricating method thereof

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United States of America Patent

PATENT NO 7205603
SERIAL NO

10764037

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Abstract

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A floating gate and fabrication method thereof. A semiconductor substrate is provided, on which an oxide layer, a first conducting layer, and a patterned hard mask layer having an opening are sequentially formed. A spacer is formed on the sidewall of the opening. A second conducting layer is formed on the hard mask layer. The second conducting layer is planarized to expose the surface of the patterned hard mask layer. The surface of the second conducting layer is oxidized to form an oxide layer. The patterned hard mask layer and the oxide layer and the first conducting layer underlying the patterned hard mask layer are removed.

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Patent Owner(s)

  • NANYA TECHNOLOGY CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chuang, Ying-Cheng Bade, TW 59 229
Huang, Chung-Lin Taichung, TW 102 304
Lin, Chi-Hui Taipei, TW 46 319

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