System and method for testing non-volatile memory express storage devices
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United States of America Patent
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Dec 5, 2023
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N/A
app pub date -
Dec 13, 2021
filing date -
Dec 14, 2020
priority date (Note) -
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Abstract
PCIe devices may be connected to a test system for development, quality assurance, manufacturing, design validation, qualification, certification, and other testing. PCIe bus or other unexpected errors can avoid direct capture by the test system. Inserting a PCIe analyzer can capture a trace of PCIe bus data around any specific trigger. Due to the high volume and speed of data crossing the data bus when testing multiple devices, finding a correct trigger for an analyzer trace capture is akin to finding a needle in a haystack. By configuring a specific trigger pattern that the test system can send across the PCIe bus without impacting any of the devices under test, the test system can trigger the analyzer at the precise time needed to capture a PCIe bus data trace around the error.
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