Method of a non-metal barrier copper damascene integration

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United States of America Patent

PATENT NO 7151315
SERIAL NO

10459222

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Abstract

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The present disclosure provides a method, integrated circuit, and interconnect structure utilizing non-metal barrier copper damascene integration. The method is provided for fabricating an interconnect for connecting to one or more front end of line (FEOL) devices. The method includes forming a layer of doped oxide on the one or more FEOL devices and forming a first barrier layer on the layer of doped oxide, the first barrier layer comprising such material as silicon oxycarbide (SiOC) or silicon carbonitride (SiCN). The method further includes forming a plurality of refractory metal plugs in the first barrier layer and the doped oxide layer, forming a low dielectric constant film over the first barrier layer and the plurality of refractory metal plugs, and performing a first etch to create trenches through the low dielectric constant film. The plurality of refractory metal plugs and the first barrier layer perform as an etch-stop.

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Patent Owner(s)

  • TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Jang, Syun-Ming Hsin-Chu, TW 374 6657
Lu, Yung-Chen Hsin-Chu, TW 13 275
Wu, Zhen-Cheng Hsin-Chu, TW 62 666

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