Semiconductor device with passivation layer covering wiring layer
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United States of America Patent
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Feb 1, 2011
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N/A
app pub date -
Mar 22, 2006
filing date -
Mar 25, 2005
priority date (Note) -
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Abstract
The invention provides a semiconductor device with a bonding pad made of a wiring layer including aluminum and its manufacturing method that enhance the yield of the semiconductor device. The method of manufacturing the semiconductor device of the invention includes removing a portion of an antireflection layer (e.g. made of a titanium alloy) formed on an uppermost second wiring layer (e.g. made of aluminum) on a semiconductor substrate by etching, forming a passivation layer covering the antireflection layer and a portion of the second wiring layer where the antireflection layer is not formed and having an opening exposing the other portion of the second wiring layer, and dividing the semiconductor substrate into a plurality of semiconductor dice by dicing. These processes can prevent the antireflection layer from being exposed in the opening, and this can prevent a component of the second wiring layer from being eluted due to cell reaction between the second wiring layer and the antireflection layer as has been seen in the conventional art.
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