Dead time control circuit capable of adjusting temperature characteristics of dead time

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United States of America Patent

PATENT NO 7400163
APP PUB NO 20060290401A1
SERIAL NO

11455198

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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In a dead time control circuit, a delay circuit is connected to an input terminal and adapted to delay signals therethrough by a delay time corresponding to a dead time. A logic circuit has a first input connected via the delay circuit to the input terminal, a second input connected directly to the input terminal, and an output connected to an output terminal. The dead time having adjustable temperature characteristics.

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Patent Owner(s)

  • RENESAS ELECTRONICS CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Yanagigawa, Hiroshi Shiga, JP 24 63
Yoshida, Mitsuru Shiga, JP 56 382

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