Shift register capable of reducing coupling effect
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United States of America Patent
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Apr 16, 2013
Grant Date -
Sep 30, 2010
app pub date -
Dec 14, 2009
filing date -
Mar 24, 2009
priority date (Note) -
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status (Latency Note)
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Abstract
A shift register has a plurality of shift register units coupled in series. Each shift register includes a pull-up circuit, an input circuit, a pull-down circuit, a compensation circuit, an input end, an output end and a node. Each shift register unit receives an input voltage at the input end and provides an output voltage at the output end. The input circuit transmits the input voltage to the node based on a first clock signal. The pull-up circuit provides the output voltage based on a second clock signal and the voltage level of the node. The pull-down circuit selectively connects the node with the output end according to a third clock signal. The compensation circuit is coupled to the input circuit, the pull-down circuit and the node for maintaining the voltage level of the node based on the second and third clock signals.
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