Gate-all-around integrated circuit structures having asymmetric source and drain contact structures

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United States of America Patent

PATENT NO 11799037
APP PUB NO 20220262957A1
SERIAL NO

17737882

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Abstract

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Gate-all-around integrated circuit structures having asymmetric source and drain contact structures, and methods of fabricating gate-all-around integrated circuit structures having asymmetric source and drain contact structures, are described. For example, an integrated circuit structure includes a vertical arrangement of nanowires above a fin. A gate stack is over the vertical arrangement of nanowires. A first epitaxial source or drain structure is at a first end of the vertical arrangement of nanowires. A second epitaxial source or drain structure is at a second end of the vertical arrangement of nanowires. A first conductive contact structure is coupled to the first epitaxial source or drain structure. A second conductive contact structure is coupled to the second epitaxial source or drain structure. The second conductive contact structure is deeper along the fin than the first conductive contact structure.

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Patent Owner(s)

  • INTEL CORP.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ghani, Tahir Portland, US 694 6983
Guha, Biswajeet Hillsboro, US 116 287
Kobrinsky, Mauro J Portland, US 113 1463

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