Circuitry for synthesizing an arbitrary clock signal and methods for the synthesis thereof
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United States of America Patent
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Oct 30, 2007
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N/A
app pub date -
Mar 8, 2004
filing date -
Mar 8, 2004
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Abstract
Circuitry for synthesizing an arbitrary clock signal with minimal jitter is provided. The circuitry of this invention selectively multiplexes a sequence of two different byte patterns into a serializer, which serializes the sequence and transmits it to receiver circuitry in the serial domain. The frequency of the synthesized clock transmitted by the serializer is a function of the serialized sequence and the frequency in which the serialized sequence is transmitted to the receiver circuitry. Thus, a desired clock frequency can be synthesized by manipulating the byte patterns and the sequence in which the bytes are serialized.
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