Device for synchronizing the output pulses of a circuit with an input clock
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United States of America Patent
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Mar 14, 1989
Grant Date -
N/A
app pub date -
Jun 24, 1987
filing date -
Jun 24, 1987
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A device for synchronizing the output test pattern signals of a test circuit with the clock signal of a device under test (DUT). The invention uses a programmable delay in the feedback loop of a phase locked loop system to adjust the phase of the test pattern signals to be synchronized with the clock of the device under test (DUT).
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