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• 15 United States
• 10 France
• 8 Japan
• 7 China
• 5 Korea
• 2 Other

Patent Owner(s)

• SAMSUNG ELECTRONICS CO., LTD.

International Classification(s)

• H01L:SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICE....

• [Classification Symbol]

• [Patents Count]

Inventor(s)

Inventor Name	Address	# of filed Patents	Total Citations
Han, Sang-cheol	Seoul , KR	7	137
Kim, Mi-young	Yongin-si , KR	55	877
Lee, Kyoung-woo	Seoul , KR	57	652

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Maintenance Fees

Fee	Large entity fee	small entity fee	micro entity fee	due date

Fee	Large entity fee	small entity fee	micro entity fee
Surcharge after expiration - Late payment is unavoidable	$700.00	$350.00	$175.00
Surcharge after expiration - Late payment is unintentional	$1,640.00	$820.00	$410.00

DATE PUBLISHED	PUBLICATION/PATENT NO.	PUBLICATION TYPE
October 06, 2009	US,7598168,B2   US7598168B2	GRANTED PATENT AS SECOND PUBLICATION
August 11, 2005	US,20050176243,A1   US20050176243A1	FIRST PUBLISHED PATENT APPLICATION

Full Text

US Patent No: 7598168

Method of fabricating dual damascene interconnection and etchant for stripping sacrificial layer

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