Minimal hardware implementation of non-parity and parity trellis

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United States of America Patent

PATENT NO 7689896
SERIAL NO

11472227

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Abstract

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Minimal hardware implementation of non-parity and parity trellis. More than one type of trellis can be represented using a minimal amount of hardware. In magnetic recording systems and other communication systems types, there is oftentimes a need to switch between trellises which support parity and ones which do not. Rules are presented herein which will ensure joint representation of more than one trellis while requiring minimal additional hardware when compared to representing only one trellis. To represent the non-parity trellis, emanating states, resultant states, and one or more expansion states (if needed) are all that is required. Any expansion states may also need to have its path metric and path memory corresponded to one of the resultant states to ensure proper detection according to the non-parity trellis.

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Patent Owner(s)

  • AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Motwani, Ravi Longmont, US 14 125

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