Boost doubler circuit
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United States of America Patent
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-
Feb 18, 2003
Grant Date -
N/A
app pub date -
Oct 11, 2000
filing date -
Oct 11, 2000
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
The present invention, generally speaking, provides a circuit that combines the features of a voltage doubler and a boost regulator to achieve a small and efficient voltage boost regulator. A capacitor is used to provide a primary voltage boost effect. An inductor is used to provide further regulation, either further boost or buck. Instead of requiring non-overlapping clock signals, the relative timing and overlap of the clock signals determines the regulation achieved. The inductor can be made significantly smaller than in comparable boost circuits, facilitating size reduction.
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