Methods of forming trench isolation regions having stress-reducing nitride layers therein

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United States of America Patent

PATENT NO 6251746
SERIAL NO

09415475

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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Methods of forming trench isolation regions include the steps of forming a trench masking layer comprising a first material (e.g., polysilicon) on a semiconductor substrate and then etching a trench in the semiconductor substrate, using the trench masking layer as etching mask. A trench nitride layer comprising a second material different from the first material is then formed on a sidewall of the trench and on a sidewall of the trench masking layer. The trench is then filled with a trench insulating material (e.g., USG). The trench masking layer is then removed by selectively etching the trench masking layer with an etchant that selectively etches the first material at a higher rate than the second material. This step of removing the trench masking layer results in exposure of a protruding portion of the trench nitride layer but does not cause the trench nitride layer to become recessed. The trench insulating material and the trench nitride layer are then etched back to define the trench isolation region.

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Patent Owner(s)

  • SAMSUNG ELECTRONICS CO., LTD.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hong, Soo-Jin Seoul, KR 30 357
Kim, Byung-Ki Kyunggi-do, KR 48 1104
Koo, Bon-Young Suwon, KR 67 1115
Shin, Seung-Mok Kyunggi-do, KR 12 866
Yu, Yung-Seob Kyunggi-do, KR 1 32

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