Method of manufacturing semiconductor MOS transistor device
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United States of America Patent
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Feb 5, 2008
Grant Date -
May 4, 2006
app pub date -
Nov 8, 2005
filing date -
Oct 28, 2004
priority date (Note) -
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Abstract
A method of manufacturing a metal-oxide-semiconductor (MOS) transistor device is disclosed. A semiconductor substrate having a main surface is prepared. A gate dielectric layer is formed on the main surface. A gate electrode is patterned on the gate dielectric layer. The gate electrode has vertical sidewalls and a top surface. A liner is formed on the vertical sidewalls of the gate electrode. A silicon nitride spacer is formed on the liner. The main surface is then ion implanted using the gate electrode and the silicon nitride spacer as an implantation mask, thereby forming a source/drain region of the MOS transistor device in the main surface. The silicon nitride spacer is removed. A silicon nitride cap layer that borders the liner is deposited. The silicon nitride cap layer has a specific stress status.
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