Manufacturing method of semiconductor device with amorphous silicon layer formation

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United States of America Patent

PATENT NO 8546247
APP PUB NO 20090227085A1
SERIAL NO

12364211

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Abstract

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A method of manufacturing a semiconductor device, in which an amorphous silicon layer is formed into a shape of a gate electrode of a MOS transistor, and then impurity is implanted to a surface of a silicon substrate from a diagonal direction using the amorphous silicon layer as a mask.

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Patent Owner(s)

  • FUJITSU SEMICONDUCTOR LIMITED

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Fukutome, Hidenobu Kawasaki, JP 25 345
Momiyama, Youichi Kawasaki, JP 10 61

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