Method for fabricating transistor with polymetal gate electrode
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United States of America Patent
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Apr 18, 2006
Grant Date -
Dec 30, 2004
app pub date -
Dec 30, 2003
filing date -
Jun 30, 2003
priority date (Note) -
Expired
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Abstract
The present invention is related to a method for fabricating a transistor with a polymetal gate electrode structure. The method includes the steps of: forming a gate insulation layer on a substrate; forming a patterned gate stack structure on the gate insulation layer, wherein the patterned stack structure includes a polysilicon layer as a bottom layer and a metal layer as an upper layer; forming a silicon oxide-based capping layer along a profile containing the patterned gate stack structure and on the gate insulation layer at a predetermined temperature that prevents oxidation of the metal layer; and performing a gate re-oxidation process.
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