Multi-layer crystalline back gated thin film transistor

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 11152514
APP PUB NO 20200357929A1
SERIAL NO

16640340

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Abstract

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Described is an apparatus which comprises: a gate comprising a metal; a first layer adjacent to the gate, the first layer comprising a dielectric material; a second layer adjacent to the first layer, the second layer comprising a second material; a third layer adjacent to the second layer, the third layer comprising a third material including an amorphous metal oxide; a fourth layer adjacent to the third layer, the fourth layer comprising a fourth material, wherein the fourth and second materials are different than the third material; a source partially adjacent to the fourth layer; and a drain partially adjacent to the fourth layer.

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Patent Owner(s)

  • INTEL CORP.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Dewey, Gilbert Hillsboro, US 440 4103
Gardner, Sanaz Portland, US 23 93
Ghani, Tahir Portland, US 698 6983
Kavalieros, Jack Portland, US 270 9074
Le, Van H Portland, US 269 2821
Lin, Kevin Beaverton, US 161 1791
Millard, Kent Hillsboro, US 4 5
Sharma, Abhishek A Hillsboro, US 230 360
Shivaraman, Shriram Hillsboro, US 79 372
Tan, Li Huey Hillsboro, US 8 8
Tronic, Tristan A Aloha, US 31 35
Weber, Justin R Hillsboro, US 13 344

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