Method of forming a field effect transistor

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United States of America Patent

PATENT NO 5940692
SERIAL NO

08780235

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Abstract

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A method of reducing diffusion of impurity dopants within a semiconductive material beneath a field effect transistor gate in a process of forming a field effect transistor includes, a) providing a bulk monocrystalline silicon substrate; b) providing a gate oxide layer over the silicon substrate; c) providing a patterned gate over the gate oxide layer, the gate having sidewalls; d) providing a pair of diffusion regions within the silicon substrate adjacent the gate sidewalls; and e) subjecting the wafer to an oxidizing atmosphere at a pressure of from about 5 atmospheres to about 30 atmospheres and at a temperature of from about 650.degree. C. to about 750.degree. C. for a period of time from about 5 minutes to about 30 minutes effective, i) to oxidize the gate sidewalls, ii) to oxidize the semiconductive material substrate adjacent the gate sidewalls, and iii) to thicken the gate oxide layer adjacent the gate sidewalls.

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Patent Owner(s)

  • MICRON TECHNOLOGY, INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Fazan, Pierre C Boise, ID 145 4240
Jeng, Nanseng Boise, ID 54 759
Mathews, Viju K Boise, ID 40 728

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