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Abstract

A phase comparing circuit can be made as a semiconductor integrated circuit for inclusion in a phase-locked loop for generating a phase-locked output signal synchronized with a pilot signal. The phase comparing circuit generates first and second reference signals with reverse polarity about their DC level from the pilot signal and first and second base signals having a DC level substantially the same as the DC level of the reference signals. First and second switching signals with reverse polarity about their DC level are generated from the phase-locked output signal. A plurality of bipolar transistors are operated by the switching signals alternately to provide first and third current paths and second and fourth current paths connecting the reference and base signals to cancel the DC components therefrom. A control signal generating circuit provides a control signal current path that connects the first and third current paths and the second and fourth current paths. The control signal current path includes two control signal output terminals that have two series-connected resistors between them and a bias potential connected between the output terminals. The control signal at the output terminals represents the difference in phase between the switching and the pilot signals and is used to generate a locking signal for controlling a voltage-controlled oscillator which provides the phase-locked output signal.

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