Latching comparator with hysteresis
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United States of America Patent
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-
Feb 10, 1987
Grant Date -
N/A
app pub date -
Apr 19, 1985
filing date -
Apr 19, 1985
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A latching comparator circuit with hysteresis, including bi-state circuit means responsive to an input signal and to a reference signal for, while in a first state, changing to a second state when the input signal has a first predetermined relationship with the reference signal, and for, while in the second state, changing to the first state when the input signal has a second predetermined relationship with the reference signal. Latch means is included for connection with the bi-state circuit means and is responsive to a control signal for preventing the bi-state circuit means from changing from one of the two states to the other of the two states after the bi-state circuit means changes to the other of the two states.
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