Importance

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Abstract

The index field of an address maps to low order cache directory address lines. The remaining cache directory address line, the highest order line, is indexed by the parity of the address tag for the cache entry to be stored to or retrieved from the corresponding cache directory entry. Thus, even parity address tags are stored in cache directory locations with zero in the most significant index/address bit, while odd parity address tags are stored in cache directory locations with one in the most significant index/address bit. The opposite arrangement (msb 1=even parity; msb 0=odd parity) may also be employed, as may configurations in which parity supplies the least significant bit rather than the most significant bit. In any of these cases, even/odd parity is implied based on the location of the address tag within the cache directory. In associative caches, the mechanism may be configured so that even parity address tags are stored in one set of congruence classes (rows) or congruence class members (columns) of the cache directory, while odd parity address tags are stored in another set. The parity of an address tag field within a presented address is also utilized to test the parity of an address tag stored in the indexed location, with address tag and parity matches indicating a cache hit. In the described example, the implied parity mechanism disclosed saves about 1/12th (approximately 9%) of the cache directory array space required over configurations requiring stored parity associated with each cache directory entry. Furthermore, this mechanism improves delays within critical cache directory access paths.

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First Claim