Integrating a boolean SAT solver into a router
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United States of America Patent
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Mar 8, 2011
Grant Date -
Oct 9, 2008
app pub date -
Apr 4, 2007
filing date -
Apr 4, 2007
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Abstract
One embodiment of the present invention provides a system that routes a set of pairs of points during the design of an integrated circuit (IC) chip. The system comprises a routing engine which is configured to search for a path to connect a current pair of points in the set of pairs of points, wherein the path comprises a set of rectangles and vertices. The routing engine uses a routing database, which keeps track of previously routed nets that can obstruct the routing of the current pair of points. The system further comprises a satisfiability (SAT) solver which is capable of solving a set of constraints, wherein the set of constraints are associated with the routability of the set of pairs of points. The SAT solver additionally comprises a SAT database which maintains the set of constraints and a current partial solution to the set of constraints. The SAT database is used to update the routing database if the current partial solution changes.
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- 15 United States
- 10 France
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Patent Owner(s)
- SYNOPSYS, INC.
International Classification(s)
Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
Burch, Jerry R | Portland, US | 3 | 84 |
Damiano, Robert F | Lake Oswego, US | 7 | 162 |
Ho, Pei-Hsin | Portland, US | 14 | 396 |
Kukula, James H | Hillsboro, US | 8 | 151 |
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Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
Surcharge after expiration - Late payment is unintentional | $1,640.00 | $820.00 | $410.00 |
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