Word line boosting circuit and control circuit therefor in a semiconductor integrated circuit
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United States of America Patent
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Apr 4, 1995
Grant Date -
N/A
app pub date -
Dec 6, 1993
filing date -
Dec 5, 1992
priority date (Note) -
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status (Latency Note)
Importance
Abstract
A word line boosting circuit and a control circuit therefor in a semiconductor integrated circuit are included. A word line boosting control circuit is connected to receive block select information selecting a first or second memory cell array block synchronized to a predetermined row address, and selectively generates first and second word line voltages.
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