Memory devices for performing repair operation, memory systems including the same, and operating methods thereof
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United States of America Patent
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Oct 17, 2023
Grant Date -
Aug 4, 2022
app pub date -
Apr 13, 2022
filing date -
Dec 26, 2019
priority date (Note) -
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status (Latency Note)
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Abstract
A memory device includes a mode register set configured to store a first repair mode, a second repair mode, and a second repair off mode, and a repair control circuit configured to perform a first repair operation for permanently repairing a first wordline corresponding to a defective address to a first redundancy wordline in the first repair mode, to perform a second repair operation for temporarily repairing the first wordline corresponding to the defective address to a second redundancy wordline in the second repair mode, and to turn off a repair logic that is configured to perform the second repair operation in the second repair off mode to access old data after the second repair operation.
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