Memory packages and methods of forming same

Number of patents in Portfolio can not be more than 2000

United States of America

PATENT NO 11282816
APP PUB NO 20210225809A1
SERIAL NO

16745718

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Abstract

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A package includes a memory stack attached to a logic device, the memory stack including first memory structures, a first redistribution layer over and electrically connected to the first memory structures, second memory structures on the first redistribution layer, a second redistribution layer over and electrically connected to the second memory structures, and first metal pillars on the first redistribution layer and adjacent the second memory structures, the first metal pillars electrically connecting the first redistribution layer and the second redistribution layer, wherein each first memory structure of the first memory structures includes a memory die comprising first contact pads and a peripheral circuitry die comprising second contact pads, wherein the first contact pads of the memory die are bonded to the second contact pads of the peripheral circuitry die.

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Patent Owner(s)

  • TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Tsai, Chung-Hao Huatan Township, TW 121 615
Wang, Chuei-Tang Taichung, TW 235 1642
Wang, Yih Hsinchu, TW 238 706
Yu, Chen-Hua Hsinchu, TW 2045 41432

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