Wafer transport method

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United States of America Patent

PATENT NO 5562800
SERIAL NO

08308442

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A wafer transport method includes the steps of preparing a semiconductor process equipment having a transport chamber and a process chamber. An interface means connects the transport chamber to the process chamber. A transport means transports a semiconductor wafer from the transport chamber to the process chamber by way of the interface means. The transport means mounting a substrate is inserted into a communicating corridor including a supply means and an exhaust means. The substrate is transported while performing the supply and exhaust by sequentially controlling a supply shutoff means, an exhaust shutoff means, and a communicating shutoff means according to the position of a conductance part formed of a gap between the transport means and the communicating corridor. Thus, the substrate is transported at a high throughput without contamination of the substrate while keeping the different atmospheric conditions for the transport chamber and the process chamber, thereby manufacturing a semiconductor device with high performance capabilities.

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Patent Owner(s)

  • HITACHI, LTD.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kawamoto, Yoshifumi Kanagawa-ken, JP 43 1582
Kawamura, Yoshio Kokubunji, JP 48 2785
Mizuishi, Kenichi Hachioji, JP 28 1019
Murakami, Eiichi Tokorozawa, JP 66 1372
Nakayama, Yoshinori Sayama, JP 79 968
Seya, Eiichi Hachioji, JP 14 300
Uchida, Fumihiko Hachioji, JP 17 540
Yokoyama, Natsuki Mitaka, JP 74 1442

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